1. Field of the Invention
The present invention relates to a method of fabricating an epitaxial layer, and more particularly to a method of fabricating an epitaxial layer by combining a selective epitaxial growth process and a non-selective epitaxial growth process.
2. Description of the Prior Art
As integrated circuits become downscaled, the corresponding requirements also increase. Modern transistors need to have higher drive currents as their dimensions become ever smaller.
Such down scaling has also increased the complexity of processing and manufacturing ICs. For advances to be realized, similar developments in IC processing and manufacturing are needed. For example, a three dimensional transistor, such as a fin-like field-effect transistor (FinFET), has been introduced to replace a planar transistor. Although existing FinFET devices and methods of fabricating FinFET devices have been adequate for their intended purposes, they have not been satisfactory in all respects. Therefore, there is a need for improvement in methods of fabricating FinFET devices.